Electronic System Design Group
Arguments¶
Arguments to pass to FPGAFlow
.
Required¶
--config
¶
The configuration YAML file describing:
- configuration of the host system
- source-code repository layout
See Configuration for description.
Optional¶
--checkout_enabled
¶
Enables checkout of source code from repository. Defaults to: False
.
To use:
--checkout_enabled
--headless
¶
Headless Flag for Forcing GUI Based Options to False
. Used to ensure Continuous Integration environments
execute unimpeded by external user input. Defaults to: False
.
--headless
--skip_xml2vhdl
¶
Prevents the XML2VHDL Generation Script from being executed. Defaults to: False
.
To use:
--skip_xml2vhdl
Warning
This Argument should be used with caution. It assumes existing generated .vhd
exists
for the project to compile. The resulting compilation may be out-of-date if changes to
the memory-map have been made to any .xml
files in the project.
--open_gui
¶
Opens project in GUI. Overwritten by --headless
, which will prevent any GUI from running.
fpga
¶
Opens the project in either quartus
or vivado
.
--clean
¶
Cleans Output Paths Generated by FPGAFlow
.
all
¶
Cleans all generated output paths excluding 'precompiled_sim'
which must be called explicitly.
fpga
¶
Cleans the project for the current vendor
, tool_version
and project_name
. Any existing FPGA
Vendor project in the build path will be backed up, by appending a date/time stamp to the build folder and
a new project will be generated by the script. If not used as an argument the script will use the existing
project.
ip
¶
Cleans the projects vendor_ip
enabled IP generated paths for the current vendor
, tool_version
.
precompiled_sim
¶
Cleans the pre-compiled libraries for the current vendor
, tool_version
, sim_vendor
and
sim__version
for under the root path defined by $SIM_PRE_COMPILED_LIBS_PATH
.
Warning
This may fail if the user does not have the correct permissions to operate on this directory.