Electronic System Design Group
VUnit Integration¶
FPGAFlow
uses VUnit
to handle HDL
libraries and dependencies for FPGA Vendor project generation
and the simulation of HDL
Modules. Configuration of VUnit
is handled by the vunit_args:
section of the Settings file.
Standard Libraries¶
Standard libraries are located in a precompiled area, so that they only require compiling once per version of Modelsim and FPGA tool version.
Currently the script compiles standard libraries for all families and libraries. However for each library to
be added to the generated VUnit
object it needs to be included in the corresponding list of simulation
libraries under xilinx: or altera: in the Configuration
file.
Standard libraries are generated in:
$SIM_PRE_COMPILED_LIBS_PATH/<VENDOR>/<TOOL_VERSION>/<SIM_VENDOR>_<SIM_VERSION>/standard
Note
The values here are used by Tag Substitution replacing the <UPPERCASE>
tags with
corresponding values from the Settings file.
Project IP Libraries¶
Project specific IP libraries are generated in: